This invention relates to transistors and, in particular, to transistors for use in high voltage devices.
There is increasing demand for high voltage devices in applications such as medical, printer, and automotive applications. High voltage devices require special, and sometimes considerable, development activities to meet several requirements for process integration, performance and reliability. In some instances, field effect transistors (FETs) are used in high voltage devices.
FETs typically have four terminals, which are known as the gate, drain, source and body. The names of the terminals refer to their functions. The gate terminal may be thought of as controlling the opening and closing of a physical gate. This gate permits electrons to flow through or blocks their passage by creating or eliminating a channel through the body between the source and drain. Electrons flow from the source terminal towards the drain terminal if influenced by an applied voltage. The body simply refers to the bulk of the semiconductor in which the gate, source and drain lie. Usually the body terminal is connected to the highest or lowest voltage within the circuit, depending on type.
FIG. 1 shows an example of a typical FET 100. The gate 102 is typically separated from the body 104 by a dielectric layer 106. The dielectric layer 106 (or gate dielectric) is typically formed by a silicon based dielectric material. The purpose, as is well known in the prior art, of the dielectric layer 106 is to separate the gate 102 from the body 104. As shown in FIG. 1, the gate 102 and the dielectric layer 106 are disposed above both the source 108 and the drain 110. As shown, the source 108 and the drain 110 are in the same horizontal plane and the gate 102 is disposed in a horizontal plane above them both. Such a layout shall be referred to herein as a vertical layout (herein).
To maintain electrical integrity of the gate dielectric 106, devices that must operate at higher voltage typically require thicker dielectric avoid electrical breakdown. For a 5V application, a dielectric thickness of about 12 nm is required, and for a 20V application, a dielectric thickness of about 45 nm may be needed. In short, the higher to voltage, the thicker the dielectric layer 106 needs to be.
In addition to the thicker dielectric, high voltage devices should have good device surface mobility, low interface states and low density of fixed trapped charge, so as to ensure good hot carrier reliability and device long term stability. Also the gate dielectric should have low defect density for high yield and a high breakdown electric field for good reliability.
In addition, high voltage devices, in many applications are desired to have good operational characteristics in the RF range above 2 GHz. For that, a FET needs low surface degradation and low interface states for good 1/f noise performance. The FET should also have low gate dielectric capacitance and low dielectric constant to ensure low gate capacitance and a high frequency cut-off point. Also, high voltage devices are often employed in analog applications, such as power amplifiers, thus, it may be desirable for the FET to have a good amplification factor and frequency response.